Samsung's archrival wants to spread 100 special CPUs in every SSD controller ahead of PCIe 8.0, High Bandwidth Flash onslaught

Date:
Sat, 24 Oct 2026 21:20:00 +0000

Description:
SK Hynix plans to deploy over 100 specialized processors in SSD controllers, reducing power consumption and chip area.

FULL STORY ======================================================================Copy link Facebook X Whatsapp Reddit Pinterest Flipboard Threads Email Share this article 0 Join the conversation Follow us Add us as a preferred source on Google Newsletter Subscribe to our newsletter SK Hynix plans to distribute more than 100 processors across SSD controllers H-TPUs reportedly consume
just 2.5% of conventional CPU core power Each H-TPU occupies only 4% of a general-purpose processor core's area SK Hynix is developing solid-state
drive controllers with more than 100 compact processors to manage
increasingly demanding data transfers.

The South Korean memory manufacturer says its Hynix Transaction Processing Unit (H-TPU) architecture reduces processor power requirements and chip area. The technology is designed for enterprise storage products and future memory systems serving demanding artificial intelligence workloads. Latest Videos From TechRadar Watch full video here: Small processors take over repetitive SSD operations Speaking at the recent International SoC Design Conference, SK Hynix vice president Koo In-je described limitations affecting conventional SSD controller designs.

"Currently, general-purpose CPUs inside SSD controllers are at their limits
in terms of power consumption and area," he said. You may like SK Hynix and SanDisk reveal first specs for High Bandwidth Flash Kioxia has nothing to lose, so it wants to swap expensive DDR for the world's fastest SSD ever
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"Instead, SK Hynix has developed an H-TPU that can efficiently handle common input/output (I/O) transmission paths."

Conventional processors handle routine operations alongside demanding tasks, including reading and writing data, updating metadata, and controlling buffers. Are you a pro? Subscribe to our newsletter Sign up to the TechRadar Pro newsletter to get all the top news, opinion, features and guidance your business needs to succeed! Contact me with news and offers from other Future brands Receive email from us on behalf of our trusted partners or sponsors By submitting your information you agree to the Terms & Conditions and Privacy Policy and are aged 16 or over.

Faster storage interfaces increase these workloads, potentially requiring additional processor cores and increasing the controller's physical footprint and electricity consumption.

H-TPUs separate repetitive operations from complicated processing, allowing numerous specialized cores to handle individual responsibilities.

SK Hynix says each processor uses just 4% of the chip area occupied by a general-purpose CPU core and consumes approximately 2.5% of its power. What
to read next Kioxia beats its own world record with the fastest SSD ever produced new PCIe 6.0 GP1 tops 20M IOPS and is part of Kioxia's plan to challenge DRAM in AI markets Kioxia showcases the worlds fastest SSD with mind-blowing 10M IOPS and a staggering 50 DWPD endurance Samsung could follow Micron by outsourcing DDR5 and SSD production to third parties to focus on more lucrative HBM and enterprise products could SanDisk follow suit?

The architecture uses a four-stage pipeline and sequential execution, which
SK Hynix considers suitable for recurring storage operations.

Rather than activating every processor continuously, the controller enables the units required for each incoming request and places unnecessary
processors into idle mode.

Conventional CPU cores remain responsible for demanding functions such as error recovery, exception management, and storage policy decisions.

This division allows specialized processors to handle routine work while the main controller retains responsibility for more complex operations. SK Hynix plans H-TPUs for next-generation storage SK Hynix intends to incorporate H-TPUs into upcoming enterprise SSD controllers and its Storage Next architecture.

The company also plans to use the technology with High Bandwidth Flash (HBF), a memory technology expected to enter the market next year.

Storage Next is designed to handle smaller data requests associated with
newer AI models, including transactions involving 512 bytes or less.

That represents one-eighth of the conventional 4KB data unit, allowing
storage systems to access smaller portions of information.

Future PCIe generations, including PCIe 6.0, 7.0 and 8.0, are expected to increase transfer speeds, placing additional demands on storage controllers.

Distributing repetitive processing across many small cores could help limit power consumption and physical expansion as those demands grow.

SK Hynix also intends to extend the technology to its AIN storage portfolio, which includes the AIN P, AIN B and AIN D product families.

The company has not disclosed when H-TPUs will reach individual commercial products or quantified their effects on overall SSD performance.

Via The Elec (originally in Japanese) Follow TechRadar on Google News and add us as a preferred source to get our expert news, reviews, and opinion in your feeds.



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Link to news story: https://www.techradar.com/pro/samsungs-archrival-wants-to-spread-100-special-c pus-in-every-ssd-controller-ahead-of-pcie-8-0-high-bandwidth-flash-onslaught


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